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One tungsten diselenide crystal becomes channel, gate oxide and contacts in an IBS transistor

IBS researchers built a transistor out of one tungsten diselenide crystal, switching tenfold in current per 61.3 millivolts. The gate oxide is made from the channel's own top layers, so the design skips the deposition step that has held back 2D electronics.

The Scientist · Science desk

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Illustration accompanying One tungsten diselenide crystal becomes channel, gate oxide and contacts in an IBS transistor
Generated illustration
Converted-oxide transistor switches near the limit Gate voltage needed for a tenfold current rise in the WSe2 transistors, the theoretical room-temperature limit, and the gate oxide's effective thickness.

A 61.3 millivolt change in gate voltage raised current tenfold in the WSe2 transistors. The theoretical room-temperature limit is about 60 millivolts per decade. The gate oxide, converted from the crystal's upper layers, has an effective thickness below 1 nanometer.

Converted-oxide transistor switches near the limit
FigureValueNoteClaim
Gate voltage change for a tenfold current rise61.3 millivolts12
Theoretical limit, about60 mV per decade12
Oxide thickness, below1 nm, effective11

What happened

  • The top layers of the WSe2 crystal were oxidized to insulating oxide, and vapor-phase reactions turned parts of it into an n-type semiconductor or a semimetal.
  • The oxide above the channel served as the gate dielectric with an effective thickness under 1 nanometer, and no separate high-k material was deposited.
  • Reaction temperature and gas pressure set how many layers converted, with control at roughly 0.7 nanometers per monolayer.
  • The work, led by Jo Moon-Ho at IBS's Center for Van der Waals Quantum Solids, is published in Science.

Why it matters

  • What's now possible capability A gate dielectric grown from the channel itself removes the deposition step where uniform coverage on a 2D surface has been hardest to get.
  • Who has to decide decision Groups choosing an integration route for 2D devices now have in-place conversion to weigh against metal deposition and mechanical transfer.
  • What it limits constraint Production relevance depends on uniform conversion over large areas.
  • Who's exposed exposure A swing within about 2 percent of the limit shows the gate stack works. The contacts, which the same process also has to supply, are a separate question.

The 61.3 millivolt figure sits about 1.3 millivolts above the roughly 60 millivolts per decade room-temperature limit, a gap of about 2 percent [13]. That is a strong result for a gate stack, and it came from an oxide formed out of the channel's own upper layers [11][12].

The design answers a specific list of failures. According to the phys.org account of the work, the surfaces of 2D semiconductors have few sites where other materials can attach, so conventional dielectrics are hard to deposit uniformly [4]. Deposited metals can damage the atomically thin semiconductor or create large contact barriers [5]. Peeling and stacking separate 2D materials avoids both problems, but those transfer methods are difficult to scale uniformly over large areas and poorly suited to mass production [6].

Converting layers in place removes the step where a foreign material has to land on a hard-to-wet surface. The tungsten framework stays intact while the surrounding atoms are swapped, so every region shares a parent lattice [7]. We think that shared lattice is the real design choice here, and the one a reviewer would press on.

Jo said of the motivation: "One of the central challenges in two-dimensional semiconductor research has not simply been finding better semiconductors, but securing equally suitable dielectrics and electrical contacts." [10]

The account of the paper available to us gives no contact-resistance or large-area data, and no device counts or sample size. That single write-up is our only source. The production bottleneck, by the account above, is uniformity across large areas [6]. Reaction temperature and gas pressure are the controls the team used to stop conversion at a chosen layer [9], and those are the quantities a large-area test would have to hold steady.

What to watch

  • Whether the team or others report contact resistance for the converted semimetal regions.
  • Conversion-depth data across a wafer or a large area, which would show if the temperature and pressure recipe holds uniformly.
  • Independent groups reproducing the sub-1-nanometer oxide and the near-limit switching on their own WSe2 crystals.

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Evidence62
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Claim ledger

Ranked by verification strength, evidence, and original report placement.

  1. [1]

    A transistor normally requires a semiconductor to carry current, an insulating dielectric to control it and metallic contacts; integrating these components gets harder as devices approach the atomic scale.

    Reported Supported Source: phys.org account of IBS researchView cited source
  2. [2]

    A team led by Director Jo Moon-Ho of the Center for Van der Waals Quantum Solids at the Institute for Basic Science published the work in the journal Science.

    Reported Supported Source: phys.org account of IBS researchView cited source
  3. [3]

    Instead of fabricating the semiconductor, dielectric and contact materials separately and assembling them, the researchers started from a single layered crystal and chemically converted selected atomic layers and regions into the different materials needed for a working transistor.

    Reported Supported Source: phys.org account of IBS researchView cited source

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Sources

1 independent publisher whose own reporting we read for this story.

  1. phys.org

    1 article · October 15, 2026

    Single 2D crystal transforms into transistor with built-in insulation and electrical contacts

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