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RIKEN's shared-line silicon qubits stay above 99.99% fidelity with three running at once

RIKEN researchers held gate fidelity above 99.99% with three silicon spin qubits running at once on a shared microwave line. With all five driven it falls to about 99.9%, a level the RIKEN account calls close to what fault-tolerant computing needs.

The Scientist · Science desk

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Illustration accompanying RIKEN's shared-line silicon qubits stay above 99.99% fidelity with three running at once
Generated illustration
Fidelity drops when all five qubits run at once Single-qubit gate fidelity on RIKEN's five-qubit silicon array, by how many qubits are operated at the same time.

Key figures for RIKEN's silicon qubits: approximately 99.9% gate fidelity with all five qubits operated at once; above 99.99% with up to three at once, using the team's protocol; the best qubit operated alone approaching 99.999%, with each above 99.99%.

Fidelity drops when all five qubits run at once
FigureValueNoteClaim
Gate fidelity, all five qubits at once, approximately99.9%8
Fidelity, up to three qubits at once, above99.99%using the team's protocol7
Best qubit operated alone, approaching99.999%each of the five above 99.99% alone6

What happened

  • The work, published in Nature Physics, came from RIKEN's Center for Emergent Matter Science and collaborators, who built their test on a five-qubit silicon array.
  • The team found that the main source of error in simultaneous operation is the AC Stark shift, a phase shift induced by the microwave control signals.
  • Run one at a time, each of the five qubits had single-qubit gate fidelity well above 99.99%, with the best approaching 99.999%.
  • The researchers attribute the remaining loss to drive-induced decoherence, caused by the extra microwave power that simultaneous operation needs.

Why it matters

  • What it limits constraint The evidence is one five-qubit array and figures framed as single-qubit gate fidelities. The account does not mention two-qubit gates or say how many three-qubit combinations were measured, so it cannot back claims about larger arrays or a full processor.
  • Who has to decide decision Groups building silicon arrays on shared lines now have a named phase error to calibrate and a second, power-driven error that, by Camenzind's account, only device design is expected to reduce.
  • What doesn't add up contradiction Camenzind said high-fidelity control "can be maintained even when several qubits are operated at the same time". The data support that for up to three of the five qubits, not for the whole array.

The design choice that lets this scale is how the phase error gets corrected. The team built a protocol of phase calibrations that uses calibrations between pairs of qubits [4]. First author Yi-Hsien Wu said: "Rather than requiring an entirely separate calibration procedure for every possible combination of qubits, our method uses calibrations between pairs of qubits to compensate for the unwanted phase shifts." [5] On a five-qubit array that means 10 pairs [12], against 26 groups of two or more qubits that could be driven together [13]. Pair counts grow with the square of the qubit number, while group counts double with every qubit added. The comparison is ours. The account does not say how many calibrations the team actually ran.

The solo runs act as the control. Every qubit scored well on its own [6], so the drop at larger parallel loads traces to driving them together, not to weak devices. Between three qubits and five, fidelity goes from above 99.99% [7] to about 99.9% [8], an error rate at least roughly ten times higher [14].

The protocol targets phase shifts. The remaining effect, according to the account, involves a loss of quantum coherence, which is a different kind of error [10]. Camenzind, a RIKEN research scientist, co-first author and the person who supervised the experiments [2], called it a limitation. He said: "This is a limitation, but further improvements to device design could help mitigate this source of error." [11]

Camenzind also said the study "supports the use of shared control lines as a practical approach to scaling up quantum processors." [15] We think that holds for the three-qubit result, where one named error was found and calibrated out on a shared line. For the full array it depends on device-design changes the team says could reduce the power-related error [11].

What to watch

  • Whether RIKEN or another group applies pairwise calibration to a larger array and reports how many calibrations it needed.
  • A device-design change that cuts the microwave power needed and restores fidelity above 99.99% with all five qubits driven.
  • Two-qubit gate fidelity measured under the same shared-line parallel drive.

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  1. [1]

    A study published in Nature Physics by researchers from the RIKEN Center for Emergent Matter Science and collaborators used a five-qubit silicon array controlled through a single shared microwave line.

    Reported Supported Source: phys.org account of the RIKEN Nature Physics studyView cited source
  2. [2]

    Leon Camenzind is a research scientist at RIKEN and co-first author who supervised the experiments; Yi-Hsien Wu is the first author who carried out the experiments as part of his Ph.D. research.

    Reported Supported Source: phys.org account of the RIKEN studyView cited source
  3. [3]

    The researchers found that the major source of degradation in simultaneous qubit operation is the AC Stark shift, induced by the microwave control signals, which shifts the phase of a qubit's quantum state.

    Reported Supported Source: phys.org account of the RIKEN studyView cited source

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Sources

1 independent publisher whose own reporting we read for this story.

  1. phys.org

    1 article · October 15, 2026

    Silicon qubits surpass 99.99% gate fidelity while operating three at once

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