Rutgers and IBM hold a 100-qubit chain in order with nearly 5,000 mid-run resets

Interesting Engineering ran the result under a headline about a "100-qubit chip" that "advances self-correcting quantum computers" ^[14]. The chip is a 156-qubit IBM Quantum Heron. The team picked a connected chain of up to 100 of its qubits, about 64 percent of the processor ^[2][15]. Whoever forwards that headline to a CTO on Monday will be explaining it by Friday.

The paper, published in Nature Physics by researchers from Rutgers, IBM and collaborating institutions, reports a control experiment ^[1]. The team set how often the scrambling and the resets ran, then watched which one won ^[5]. More scrambling kept the chain chaotic. More measuring and resetting pushed it into an orderly, controllable state ^[5]. Justin Wilson, an associate professor of physics at Louisiana State University and a coauthor, explained that random interventions could suppress otherwise unpredictable behavior, the publication reported ^[11]. Whether the transition would survive in a quantum system at all had been uncertain, and it did ^[7].

For the person planning around quantum hardware, the useful part is the repetition. A fault-tolerant machine has to run its corrections many times over without destroying the information it is processing ^[13]. The resets here ran alongside nearly 5,000 two-qubit operations while the calculation kept going ^[4]. IBM researcher Maika Takita said the experiment kept operations, measurements and resets working together thousands of times on a large system, and called that an important step toward practical error correction, according to the report ^[10].

The loop runs at 100-qubit scale on existing hardware, and its threshold matched theoretical predictions ^[12][7]. On that evidence, I think the control side of error correction is now an engineering problem. The write-up does not report an error rate for any encoded qubit, and by its own account the demonstration does not establish a fully fault-tolerant computer ^[12].

Two tests sort announcements like this one. The first is whether the hardware repeated an intervention at scale while a computation kept running. The second is whether encoded information came out of that process with fewer errors than it went in with. This result passes the first and leaves the second unshown ^[4][12]. Passing both is what would justify moving budget toward error-corrected workloads. Passing only the first justifies having one person on the team learn how mid-circuit resets are programmed and read each follow-up paper, at the cost of that person's time and with no production payoff yet.