NVIDIA and Cisco propose USFP, an OSFP-sized optic with 16 lanes at 400Gb/s each

The first planned USFP module has 16 lanes in an OSFP-sized footprint ^[2]. At 400Gb/s per lane, that is 6.4Tb/s per direction ^[7]. The 4x claim fits that figure. The release says the design doubles both lane count and per-lane rate ^[12], which puts the 200Gb/s baseline at 8 lanes and 1.6Tb/s, and four times 1.6 is 6.4 ^[15].

The 12.8Tb/s ceiling ^[1] takes 32 lanes at 400Gb/s ^[8]. The connector is designed to allow 32 lanes ^[4], but the first module is not that part. The other reading is that 12.8Tb/s counts both directions of a full-duplex 16-lane module. The release does not say which basis it uses.

The motivation is switch radix. According to the release, when a switch reaches capacity, further expansion can require more switch layers and optical links, which adds latency, power and cost ^[14]. The pitch is more 1.6Tb/s endpoints per switch without another tier ^[12]. Cisco's Bill Gartner, senior vice president and general manager of optical systems and optics, put the goal in operational terms. "AI builders need an interconnect architecture that can scale performance without locking them into a more complex operating model," he said ^[10].

Power needs a closer look. The 1.3x figure is per bit. If it means bits moved per watt, a module with 4x the bandwidth at 1.3x the efficiency draws about 3.1 times the power of the 200Gb/s module at full rate, since 4 divided by 1.3 is 3.08 ^[9]. The release puts the dissipation ceiling at 100 watts, with no separate, dedicated embedded cooling circuit inside the transceiver ^[5].

The connector is the new part. USFP mates through a two-dimensional array connector with a two-step insertion that engages the high-speed contacts after the module is inserted ^[3]. The release credits that with less contact wear, better signal integrity and more predictable insertion force ^[3]. Because it is built for 400Gb/s, it also performs better at 200Gb/s per lane ^[4].

A module that takes 400Gb/s electrical lanes needs a host that supplies them, and a new connector needs a cage that has it. We'd expect new cage hardware on every switch and SuperNIC that takes USFP. That sits against the release's line that customers can adopt it "without overhauling their data center infrastructure" ^[11]. TE Connectivity and Amphenol are working with NVIDIA and Cisco on the multi-source ecosystem ^[6].

The figures are the two vendors' own, from NVIDIA's announcement ^[13]. For the 1.3x to hold on a given fabric, the 200Gb/s-per-lane module it replaces would have to be the same optic type and reach, and the switch and SuperNIC silicon would have to drive 400Gb/s electrical lanes at no extra power penalty.