DDR2 contract prices compound to roughly double across two quarters of 2026

Multiply the two ranges instead of adding them: 1.55 times 1.35 is 2.09, 1.60 times 1.40 is 2.24, and the midpoints land at about 2.17 ^[9][10]. A part that left the first quarter at one price leaves the third at roughly two, and any bill of materials that fixed its memory line in the first quarter with a full-year quote and no pass-through clause is carrying that multiple whether or not anyone has told the finance function yet.

The mechanism feeds on itself. DDR2 is short because DDR3 designs are being redrawn onto it, and DDR3 is short because DDR4 buyers moved down a generation after mature-node wafer allocations were cut in favour of HBM and server parts ^[7][4]. The substitution is the demand. So a buyer who wants the DDR2 line item to come out flat through the third quarter has to strip 52 to 55 percent of the content out of it, since one divided by 2.09 is 0.478 and one divided by 2.24 is 0.446 ^[12], and removing half the memory from a shipping product is a redesign that has to clear whatever the product was using the memory for in the first place.

On the supply side, Winbond trimming DDR2 to make room for DDR3, DDR4 and LPDDR4 is the obvious answer for Winbond and the worst possible one for a DDR2 buyer ^[13]. ESMT's counter is to concentrate on DDR2 within its existing wafer allocation at PSMC ^[14], which reallocates bits inside ESMT's own mix rather than adding wafers to the industry, and the Taiwanese vendors that gained pricing leverage are simultaneously cutting their lower-margin lines to lift profitability ^[5][6]. That is what a supplier does when it thinks the squeeze outlasts the quarter, and that capacity does not come back on a phone call.

This is probably wrong in at least one direction. Three things could change it. The majors could swing mature-node wafers back once AI-driven HBM and server orders are filled ^[4]. PSMC could widen ESMT's allocation, which is the only lever in the story that adds bits rather than moving them ^[14]. Or the downgrades and lower-capacity configurations could destroy enough bit demand that the third-quarter estimate never prints at all ^[8][3]. My read, or rather the more interesting version of it, is that demand destruction is the likeliest brake and also the slowest, because a redesign takes longer than a quarter and the cheaper generation you redesign toward is the one absorbing everyone else's substitution ^[1].

What would falsify it is specific and checkable: a third-quarter DDR2 contract print below the 35 percent floor, or Winbond reversing its exit ^[3][13]. Until one of those shows up, the memory line is a quarterly reset rather than a fixed cost, whatever the datasheet suggests.