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Applied Materials sets a 30% cycle-time target for its new $5B EPIC Center

Applied Materials opened a $5 billion shared chip R&D center in Silicon Valley with TSMC, Intel and Samsung among its founding partners. CEO Gary Dickerson told the New York Post the aim is to cut cycle time by at least 30%, a target for a site that has just opened.

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Photograph accompanying Applied Materials sets a 30% cycle-time target for its new $5B EPIC Center
Photo: yahoo.com

What happened

  • The facility spans more than 600,000 square feet and includes almost four acres of cleanroom space.
  • Applied engineers plan to work with chipmaker counterparts on 3D architectures, advanced packaging, low-resistance wiring and hybrid bonding.
  • Micron and SK hynix round out the five founding partners, and Broadcom, Advantest and researchers from Stanford, UC Berkeley and UCLA join as innovation partners.
  • Traditionally, R&D for new chip technologies could take up to a decade, the source says.
  • Intel CEO Lip-Bu Tan said he sees a path to more than a trillion transistors in a package by 2030.

Why it matters

  • decision A chipmaker deciding whether to send engineers has one number to test, at least 30% off a prior cycle, and no usage history yet to test it against.
  • exposure Competing chipmakers will do cross-industry R&D under one roof with the same equipment vendor, so we'd expect each prospective partner to ask first how its own process work is handled.
  • capability If Applied's description holds, a chipmaker's engineers can shape a new process on the vendor's site before their own fab ever sees it.

The user in this story is a chipmaker's process engineer, and the pitch moves part of that person's tuning work into Applied's building. Prabu Raja, president of Applied's Semiconductor Products Group, said: "Because our customers' own engineers help optimize the technology before it ever reaches their factory, what leaves EPIC arrives at the fab ready to ramp to high performance and high yield sooner." [13]

That is what Applied says customers will do. What users have actually done is not yet on record, because the site has just opened [1]. The report does not include usage figures, such as how many partner engineers will work on site, or say how results are shared among partners that compete with one another. What exists today is a building, five named founding partners [7] and a target.

The target comes from Dickerson, as SiliconANGLE relays his New York Post interview: "The goal here is to cut that whole cycle time at least 30%, improving the time to market." [9] Applied to a ten-year program, 30% is three years [15]. The source gives a decade as the upper bound for traditional chip R&D [8], so three years is the most the target could save on one program, and shorter programs save less.

Dickerson also set the scope of the problem. "There are five to 10 key technologies that determine performance and yield," he said [10]. Intel's Lip-Bu Tan described the motive from the customer side: "As architectures become more complex and R&D costs continue to rise, we need to move faster and work more closely with our equipment partners." [11]

We think a team weighing a seat at a shared site like this should sort its own programs on two axes. The first is how much schedule is lost at handoffs between you and a materials or equipment supplier. Raja's pitch addresses that gap: he said EPIC is "the only place where materials, process technology and equipment will be innovated in parallel" [14]. The second axis is how much of the work you can do in the same building as competitors, since the site is built for cross-industry R&D under one roof [6].

High handoff loss and high tolerance is the case for sending one project and timing it against the program's previous cycle. High handoff loss and low tolerance points to a bilateral arrangement with the vendor. Low handoff loss leaves little for the site to save either way. The tradeoff sits in the first quadrant: it is also where your process work is closest to competitors. The comparison to run is Dickerson's, at least 30% off the earlier cycle [9].

What to watch

  • Whether any founding partner publishes cycle-time results for a project run through EPIC, measured against the 30% target.
  • Whether Applied explains how competing partners' process results are kept separate or shared inside the facility.
  • Whether Applied or its partners say how many engineers actually work on site and for how long per project.

Clarity's read

What the record supports and how the coverage leans. The claims behind it follow.

Reality

Evidence30
Adoption40
Hype gap+45
Incentives70
Confidence60
Why these scores

Claim ledger

Ranked by verification strength, evidence, and original report placement.

  1. [1]

    Applied Materials opened its Equipment and Process Innovation and Commercialization Center (EPIC), a $5 billion facility in Silicon Valley, on the day SiliconANGLE reported it.

    ReportedSupportedSource: SiliconANGLEView cited source
  2. [2]

    Applied built the EPIC Center to give the industry a shared research and development facility where engineers collaborate on new process manufacturing technologies.

    ReportedSupportedSource: SiliconANGLEView cited source
  3. [3]

    The EPIC facility spans more than 600,000 square feet and has almost four acres of cleanroom space.

    ReportedSupportedSource: SiliconANGLEView cited source

Sources

1 independent publisher whose own reporting we read for this story.

  1. siliconangle.com

    1 article · October 12, 2026

    Applied Materials opens new $5B chip research facility to accelerate collaborative semiconductor innovation

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