Intel wants enterprises to route each prompt to a right-sized system, starting with one card
Intel is pitching a 350-watt air-cooled GPU and Xeon racks at OCP to match each AI prompt to a right-sized system. The one demand figure it cited comes from a single gateway's token traffic.
The Product Desk
Key figures: Intel says the D-series supports models up to 300 billion parameters on a single card. The card is a 350-watt, air-cooled PCIe card. Intel's own branded card carries 160 gigabytes of memory, and the design supports up to 480 gigabytes.
| Figure | Value | Note | Claim |
|---|---|---|---|
| Model size on a single card, up to, per Intel | 300 billion params | 9 | |
| Card power, air-cooled | 350 watts | 6 | |
| Memory on Intel's branded card | 160 gigabytes | design supports up to 480 GB | 7 |
What happened
- Nicolas Dubé gave new details on the GPU D-series, formerly Crescent Island, and on Xeon rack designs built largely on OCP's Open Rack v3 spec.
- Intel's routing layer would score each request on depth of intelligence, context length, latency, data sensitivity and sovereignty, and cost and energy.
- Intel cited Vercel AI Gateway data showing open-weight models' share of observed token traffic rising from roughly 31% in early July to about 78% by late September.
- The D-series design supports up to 480 GB of LPDDR5X memory, while Intel's own card carries 160 GB and partners can build larger ones.
- Partner-built Xeon racks, many on ORv3, reach beyond 46,000 cores per rack at 133.45 kilowatts in select Xeon 6+ configurations.
Why it matters
- decision Buyers have to sort requests by depth and data sensitivity before buying anything. By Intel's own logic, only work that must stay in-house and does not need a frontier model clearly calls for owned hardware.
- contradiction The Xeon rack figure of 133.45 kW is 33.45 kW above the 100-plus kW liquid-cooled racks SiliconANGLE says most enterprise data centers were not built for. The report does not say how those Xeon racks are cooled, so the start-small story covers the card and leaves the rack as a facilities question.
- exposure A swing of about 47 points in open-weight token share is large enough to plan around only if it holds outside one gateway. A buyer sizing a card purchase on it inherits that limit.
- cost Intel chose cheaper, larger LPDDR memory over high-bandwidth memory, so the buyer gives up peak bandwidth for capacity and price. That pays off only where fitting the model and its context into memory is the actual bottleneck.
In SiliconANGLE's write-up, the frontier model is a senior law partner and the routine request is a memo to proofread. Most organizations, it says, default to sending every request to the partner [19]. The line: "That's like hiring a senior law partner to proofread a memo." [20] Intel's counter, as SiliconANGLE summarizes it, is that inference, not training, will define enterprise AI economics [3].
What Intel showed and what it pitched are different things. Nicolas Dubé's keynote phrase was "Put every prompt in its place." [2] The hardware has a spec sheet [6]. The routing layer has a list of factors [4], and the only cost claim attached to it is that routine coding, summarization or operational work can run on a smaller open model at "a small fraction of the cost" [21]. Dubé said: "To realize their full potential, organizations need infrastructure that can match different workloads with the right intelligence, compute resources and economics." [5]
The usage evidence is thinner than the hardware. The Vercel figure is a share of observed token traffic on one gateway [15]. Tokens measure volume, and a rising token share says nothing by itself about what customers spent or where the traffic ran. The SiliconANGLE writer says as much: "One gateway isn't the market" [16]. The writer adds having spoken with dozens of companies shifting aggressively to open models in recent months [17]. That is one analyst's sample.
The hardware case is about starting small. SiliconANGLE says a 350-watt card fits a standard air-cooled server, so a company can start with one card, move to an eight-way server and go to rack level only when the workload demands it [11]. Intel says one card supports models up to 300 billion parameters and an eight-GPU system more than 1 trillion [9]. The Xeon side is aimed at agents. SiliconANGLE says every agent generates tokens plus a significant amount of general-purpose work that runs on CPUs [22], and Intel targets Xeon 6+ with dense, efficient cores at high-concurrency agent workloads [13].
The buyer here is an enterprise with ordinary air-cooled servers and proprietary documents that may have to stay inside [21][11]. A company happy to send everything to a hosted frontier model gets the least from the pitch.
We think the useful test before any hardware conversation is a two-by-two built from the pitch's own factors: does the request need frontier-level depth, and does the data have to stay inside the enterprise [4]. Tagging costs staff time and the labels are judgment calls.
- Deep, data can leave: stays on the frontier model the team already uses. - Deep, data must stay: the hard quadrant, where Intel's eight-GPU class, quoted at more than 1 trillion parameters, is the relevant tier [9]. - Routine, data can leave: a hosted open model is enough, with no owned hardware. - Routine, data must stay: the quadrant where a single D-series card fits the pitch [9][11].
Tag a week of logged requests on those two axes and count the fourth quadrant. If it is a small share of volume, we'd expect one card to be the most the pitch justifies.
What to watch
- Whether Intel publishes pricing and a ship date for the D-series, and whether partners build cards above Intel's own 160 GB.
- Whether other gateways or enterprise surveys show open-weight token share near the 78% Vercel figure Intel cited.
- How the 133.45 kW Xeon 6+ racks are cooled and what power and facilities they need from a buyer.
Clarity's read
What the record supports and how the coverage leans. The claims behind it follow.
Reality
- Evidence35
- Adoption
- Insufficient
- Hype gap+30
- Incentives
- Insufficient
- Confidence50
Claim ledger
Ranked by verification strength, evidence, and original report placement.
- [1]
At the OCP Global Summit, Nicolas Dubé of Intel shared new details about the Intel GPU D-series, formerly code-named Crescent Island, and Xeon rack designs built largely on OCP's Open Rack v3 spec and open software work.
- [2]
Dubé framed his OCP keynote around the phrase "Put every prompt in its place."
- [3]
SiliconANGLE wrote that Intel believes inference, not training, will define enterprise AI economics and that agentic AI will bring the CPU back to the center of the data center.
- [4]
Intel's alternative is an orchestration layer that evaluates each request on the required depth of intelligence, context length, latency, data sensitivity and sovereignty, and cost and energy.
- [5]
Dubé said: "To realize their full potential, organizations need infrastructure that can match different workloads with the right intelligence, compute resources and economics."
- [6]
The D-series is built on the Xe3P architecture and delivers 1.3 petaflops of FP8 compute and 1.5 terabytes per second of memory bandwidth in a 350-watt, air-cooled PCIe form factor.
- [7]
The D-series design supports up to 480 gigabytes of LPDDR5X memory; Intel's own branded card carries 160 gigabytes, and partners can build higher-capacity cards.
- [8]
Intel chose LPDDR over high-bandwidth memory, trading peak bandwidth for capacity and cost; SiliconANGLE called that the right trade for inference, where the bottleneck is often fitting the model and its context into memory.
- [9]
Intel says the D-series supports models up to 300 billion parameters on a single card and more than 1 trillion in an eight-GPU system.
- [10]
SiliconANGLE wrote that most enterprise data centers were not built for liquid-cooled racks drawing 100-plus kilowatts.
- [11]
SiliconANGLE wrote that a 350-watt card that fits in a standard air-cooled server lets a company start with a single card, move to an eight-way server, and scale to rack-level systems only when the workload demands.
- [12]
Intel showed partner-built Xeon rack designs, many based on ORv3, with select Xeon 6+ configurations scaling beyond 46,000 cores per rack at 133.45 kilowatts.
- [13]
Xeon 6+ with dense, efficient cores targets high-concurrency agent workloads.
- [14]
The 133.45 kW Xeon 6+ rack configuration is 33.45 kW above the 100 kW mark of the liquid-cooled racks SiliconANGLE says most enterprise data centers were not built for.
- [15]
Intel cited Vercel AI Gateway data showing that open-weight models' share of observed token traffic rose from roughly 31% in early July to about 78% by late September.
- [16]
The SiliconANGLE writer wrote: "One gateway isn't the market", adding that it aligns with what the writer hears from IT leaders.
- [17]
The SiliconANGLE writer said that in recent months they have spoken with dozens of companies aggressively shifting to open models.
- [18]
The open-weight share of observed token traffic on Vercel's gateway rose by about 47 percentage points between early July and late September.
- [19]
SiliconANGLE wrote that most organizations default to sending every request to a frontier model, whether or not the task warrants it.
- [20]
SiliconANGLE wrote: "That's like hiring a senior law partner to proofread a memo."
- [21]
SiliconANGLE wrote that proprietary documents may need to remain within the enterprise, and that routine coding, summarization or operational tasks can run on a smaller open model at a small fraction of the cost.
- [22]
SiliconANGLE wrote that every agent generates tokens and a significant amount of general-purpose work that runs on CPUs.
Sources
1 independent publisher whose own reporting we read for this story.
- siliconangle.comIntel bets the next phase of AI belongs to the rightsized system, not the biggest one
1 article · October 13, 2026
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