Invest1 distinct publisher2 min readPublished
The MI455X carries 50% more HBM than the chip it replaces, and AMD's memory supplier just posted a record 76% operating margin. Rack buyers are now budgeting memory, not compute.
The Investor · Invest desk

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Set AMD's two comparison numbers next to each other and the pitch resolves. Against Vera Rubin, AMD's own product page claims 50% more memory capacity and a 15% edge in peak performance on one AI math format [3]. The capacity claim is more than three times the size of the compute claim [16]. That is a company telling buyers which line of the spec sheet to shop on.
The same table reads a second way. At 288GB, Nvidia's new generation lands, by AMD's accounting, at exactly the capacity AMD already ships in the MI355X [17]. Both vendors have settled on gigabytes as the axis, which means both are buying more of the same input from the same short list of suppliers.
At rack scale the arithmetic stops being abstract. Helios is specified at 31 terabytes of HBM4, about 72 chips' worth [9], and 31TB across 72 sockets works out near 430GB each, consistent with the chip spec [18]. Build that same 72-socket rack at the previous 288GB and it holds roughly 20.7 terabytes, so Helios carries about ten terabytes more HBM in the same box [20]. Ten terabytes is the size of the new cost line, per rack, before anyone negotiates a discount.
The supplier of that increment is having a better quarter than its customer. SK Hynix, the leading HBM maker, reported a 76% operating margin on revenue up 257% year over year [4], while AMD's adjusted gross margin was 56% on record revenue of $11.5 billion [6]. Operating margin normally sits below gross margin; here the memory maker's operating line runs about 20 points above its customer's gross line [19]. SK Hynix said high-performance products for AI servers led its price increases, with DRAM and NAND both up significantly from the first quarter [5]. Holding gross margin flat through a roughly 13% sequential revenue step [21] means pass-through, offsetting efficiencies, or both [14]. And the segment on the hook is now most of the company: data center revenue was $6.7 billion in the second quarter, 58% of the total [7].
The Anthropic agreement is where the exposure runs longest. Up to 2 gigawatts of MI450-series chips in Helios racks [11] is a commitment sized in years, and Lisa Su has described shipments starting this quarter and ramping into 2027 [10]. Anything quoted that far out has a memory price embedded in it that neither side has seen yet.
Ranked by verification strength, evidence, and original report placement.
AMD has announced a partnership under which Anthropic will deploy up to 2 gigawatts of MI450 series chips in Helios racks.
AMD's Instinct MI455X, the flagship of the MI400 series introduced this year, is specified at 432 gigabytes of HBM4, the newest generation of high-bandwidth memory.
AMD's current top chip, the MI355X, carries 288GB of the prior memory generation; the step up to the MI455X is exactly 50%.
AMD's product page stacks the MI455X against Nvidia's Vera Rubin generation: 432GB of memory against 288GB, slightly higher memory bandwidth, and a claimed 15% edge in peak performance on one AI math format. These are AMD's own marketing numbers.
SK Hynix, the leading maker of high-bandwidth memory, reported second-quarter revenue up 257% year over year with a 76% operating margin, a record for the company.
SK Hynix said high-performance products for AI servers led its price increases, with DRAM and NAND prices rising significantly from the first quarter.
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Evidence-backed comparisons of source perspectives and observed adoption signals. Read the methodology
Which Builder, Operator, and Investor concerns the observed source mix emphasized—not a truth score.
Evidence, demonstrated adoption, hype gap, incentives, and confidence are assessed independently, each on its own current evidence. How these are measured.
Primary figures, single publisher, vendor-sourced comparison
The quantitative spine — MI455X and MI355X capacities, Helios's 31TB, AMD's Q2 results and Q3 guide, SK Hynix's Q2 revenue growth and operating margin, and two direct Su quotes — is drawn from company disclosures and an earnings call, which is strong for financial and roadmap facts. But the cluster has exactly one publisher, the competitive comparison rests on AMD's own product page, and there is no benchmark, third-party pricing data, or Nvidia-side documentation to test the central capacity-versus-performance framing.
Prior generation revenue is real; MI455X/Helios only entering shipment
Adoption of AMD data center silicon is demonstrably large and growing ($6.7B quarterly, +107%), which is measured deployment. But the memory-heavy generation this story is about is at the front edge: Helios was described as in production with initial shipments only beginning, and the headline customer commitment is 'up to 2 gigawatts' of contemplated Anthropic deployments rather than installed capacity. HBM supply is described as allocated, not consumed.
Mildly overstated: vendor spec comparison and capacity ceilings outrun shipped proof
Positive but modest. The overstatement sits in the material the article is relaying rather than in the article's own conclusions: a product-page comparison against an Nvidia generation with no independent specs, a 50%-capacity headline paired with only a claimed 15% peak-performance edge on one math format, and a 2GW figure that is a ceiling. The publisher partly self-corrects by labeling the numbers as AMD marketing, distinguishing allocation from price, and stating that AMD can manage but not control memory cost — which keeps the gap small.
Vendor marketing plus investing-media price framing
Two incentive layers are visible in the material itself. AMD is the source of the comparative spec claims and of the flat-margin guidance the thesis turns on, and it has a direct interest in framing the accelerator fight on the axis where it leads. SK Hynix's disclosure of record margins serves its own pricing narrative. The single publisher is an investing-content outlet that quotes a live share price and forward multiple and closes on a shareholder judgment, so its framing is oriented to trade-relevant conclusions; it does, however, disclose the vendor provenance of the specs.
Solid on disclosed financials, thin on competitive and cost verification
Confidence is moderate. Financial and roadmap facts are quotable primary disclosures and the internal arithmetic checks out (31TB over ~72 sockets reconciles with 432GB per chip). The weaknesses are structural: one publisher, no HBM4 unit-cost data, no independent Vera Rubin specification, and no customer-side confirmation of willingness to absorb higher rack prices — so the central margin question remains open on this evidence.
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