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China's Academy of Sciences gets sub-3nm GAA transistors working without EUV

Researchers at the Chinese Academy of Sciences report an early sub-3nm transistor route built on lithography tools China can still import. Whether export controls cap advanced nodes or only slow them turns on wafer-level results still to come.

The Product Desk · Product desk

Illustration accompanying China's Academy of Sciences gets sub-3nm GAA transistors working without EUV

What happened

  • The Chinese Academy of Sciences says its researchers have completed early integration of stacked nanosheet-channel GAA CMOS transistors using deep ultraviolet lithography tools.
  • Ye Tianchun of the academy's Institute of Microelectronics said the work is still early and that further wafer-level validation is needed before the process could be transferred to a manufacturing line.
  • Samsung already mass-produces 3nm chips with GAA transistors and TSMC moved to the same architecture for its 2nm process in 2025, so the design is in volume production elsewhere.
  • US and Dutch export restrictions bar ASML from selling its most advanced EUV lithography systems to Chinese customers.

Compiled by The Product DeskSomething wrong?How this is made

Why it matters

  • constraint Anyone holding a 2027 or 2028 sourcing plan for leading-edge parts gains no usable input from this: an architecture result does not price capacity, and commercial-scale production has not been shown.
  • decision The useful choice now is an evidence rule agreed in advance, so the next Chinese node announcement gets triaged against a wafer-level test instead of argued about in a planning meeting.
  • precedent A DUV path that survives wafer-level testing would leave the EUV ban as a cost and schedule penalty on China's leading-edge roadmap, and the size of that penalty is what a forecast would have to estimate.

The person who has to do something with this is filling in a component risk line for a product that ships in 2028, deciding whether to keep paying for a second source on parts made at a leading-edge node. That line stays where it is. An integration result says a device structure can be built on a given tool set [1]. A sourcing decision needs a yield number and a line that runs the process at a cost a customer will pay, and the academy has not shown the technology can support commercial-scale production [6].

The tool gap is measurable. ASML's EUV scanners pattern with 13.5nm light [11]. Advanced DUV systems work at 193nm, the wavelength CAS reproduced in an all-solid-state laser in 2025 [12]. Divide 193 by 13.5 and the light China is allowed to buy is about 14 times longer than the light it cannot [15]. According to the Digitimes account that carried Ye Tianchun's comments [3], the compensation comes from new transistor structures, process techniques and materials [13]. The report gives no exposure count and no yield figure [17].

The account contains an early process route for sub-3nm devices, described that way by the researcher who presented it [4]. Teams tend to hear a date for Chinese 3nm production. Two columns keep them apart. In the left column go results about whether a device can be built on tools China can import. In the right go results about whether it can be built repeatedly at volume and at a price. The CAS result sits in the left column.

The architecture itself is the settled part. A GAA gate wraps the channel instead of covering three sides of it, which gives more control over current than a FinFET, as the South China Morning Post described it [7].

Huawei is working the same restriction on a different clock. In 2026 the company unveiled what it calls the Tau Scaling Law, a design approach based on "time scaling" that it says could eventually produce transistor densities comparable to a 1.4nm process by 2031 [14]. The target sits five years after the announcement [16].

For a planner the sort is binary, and most Chinese node news lands in the left column: a laser demonstration, a transistor architecture. A yield number from a named line lands in the right one. Until one appears, the 2027 and 2028 sourcing assumptions stay where they are.

What to watch

  • A wafer-level validation result from CAS's Institute of Microelectronics, with yield figures attached.
  • Any Chinese foundry saying it is transferring the DUV GAA route onto a production line.
  • Measured density numbers behind Huawei's Tau Scaling Law ahead of its 2031 claim.
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