The power path is where the rack claim cashes out. Cerebras' Hot Chips write-up puts AC/DC conversion roughly 0.5 millimetres from the wafer, against about 50 millimetres in a conventional GPU system [5], which is a hundredfold cut in how far the last conversion stage sits from the load [17]. Taking the printed circuit board out of that final delivery path, Cerebras says, lets it push nearly twice as much power into the processor at almost the same voltage while limiting resistive loss [6]. That is the enabling move behind a clock-speed generation, and it belongs to the rack rather than to the silicon.
The arithmetic is worth doing slowly. The-decoder reports per-user throughput doubling on the same 5nm WSE-3 through clock speed bought with power and cooling [12], while wafer count per rack rose 50 percent [18]. If both hold, aggregate rack throughput is around three times CS-3, and the third wafer is buying concurrency rather than single-user latency [19]. Those are different purchases and they show up in different lines of a capacity model.
Against the 4,400 tokens per second per user Cerebras quotes for CS-4 [13], the 10,000-token CS-5 target needs a further 2.3 times [20] on hardware Cerebras has not described, in a year that is still a promise [2]. The nearest shipped datapoint runs well below both: an OpenAI GPT-5.6 Sol preview on Cerebras hardware at up to 750 output tokens per second in August, with access rationed while capacity expanded [11], or about 17 percent of the CS-4 headline [21]. Different model, different generation, but it is the figure a user actually saw, and OpenAI is also running Codex Spark on Cerebras hardware [16].
Memory is the constraint the token counts do not mention. Per-wafer capacity is unchanged at 44 GB [14], so a three-wafer rack holds 132 GB [22]. Cerebras also claims more than 1,000 tokens per second on models above 10 trillion parameters, from a mix of internal benchmarks, projections and extrapolations [10]. At even one byte per parameter, 10 trillion weights is 10 TB, or roughly 76 racks of wafer memory [23]. That headline is a fleet number wearing a system's clothes.
Disaggregated inference tells you who Cerebras thinks is signing. Prefill runs on someone else's silicon, with AMD Helios and AWS Trainium named as candidates, and Cerebras takes decode [8], so the sale is incremental decode capacity bolted onto a cluster the buyer already owns. Which is exactly why cadence is the number that matters. The 50 percent component reduction and the days-to-hours deployment claim come from Cerebras, not from field data [4]; the first customer install will settle it, because that claim gets tested in a change window rather than on a benchmark chart.
