The layer table is the part worth reading. The model runs 48 layers as a repeating block, written in the config as 12 x (3 x (Gated DeltaNet -> MoE) -> 1 x (Qwen Sparse Attention -> MoE)) [7]. That gives 36 Gated DeltaNet layers and 12 sparse-attention layers [8]. NVIDIA's description of why is the clearest one published: the GDN layers compress history into a fixed-size recurrent state, so KV cache stops growing as the sequence gets longer, and the one layer in four running QSA does the precise retrieval [9].
Now the budget line. QSA is configured with a budget of 512 blocks or 2048 tokens, and its indexer is MQA with four query heads and one shared key head [10]. Divide those two numbers and each micro-block is four tokens wide [11]. So exact retrieval, at a native 262,144-token window or a million with YaRN [13], resolves to a block-level importance estimate choosing 512 of those micro-blocks [12]. That is where I would spend the evaluation budget: long-context recall on your own corpus, at your own context lengths, because the indexer's ranking is the single point on which the design's whole efficiency argument rests.
The efficiency numbers are Alibaba's, and they carry their conditions with them. The attention kernel is reported at up to 7.6x prefill and 4.9x decode against full attention on 1M-token work [20], and the serving figure of 8.6x prefill throughput over Qwen3.7-Plus was measured at 1M context with a 90% prefix-cache hit rate [21]. A coding agent replaying a large shared repository prefix might get near that. A document pipeline with cold, unique inputs will not, and should price the GDN layers alone.
On the coding table, the SWE-bench Pro margin over Claude-Opus-4.6 (Max) is 9.1 points [16], but the footnote matters more than the gap: every model there was run in the Claude Code harness at temp 1.0 and top_p 0.95, except Opus, for which Alibaba reports the officially published score [15]. The comparison is a harness-matched run against a vendor number. The margin over Alibaba's own Qwen3.8-27B, measured the same way, is 0.8 points [17]. On DeepSWE 1.1 the reported figure is the best of two harnesses, and Alibaba notes this model does better on mini-SWE-agent [18], which is a fair disclosure and also a reminder that harness choice is a tuning knob.
Then the parameter accounting. Alibaba's framing is 125B with 6B activated, plus 51B of n-gram embedding and 4B of MTP [3]; NVIDIA calls the same checkpoint 176B total [4], which is the 125B and the 51B added together [5]. The 51B is 20 million bigrams and trigrams indexed at layer 2 [28], and Alibaba's stated reason for scaling there is that embeddings are cheaper to compute and easier to offload than MoE experts [27]. Whether your stack actually offloads it decides which number goes in your capacity plan. Simon Willison's quantized runs at 72.5GB and 78.9GB [25] are the honest lower bound for local work.
Adoption cost is low: the repo ships Transformers-format weights that load in vLLM, SGLang and TokenSpeed [26]. A model numbered 3.8 previewing a model numbered 4 is a naming scheme I will not attempt to defend, but the layer table is legible, and that is the thing you can test.
