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OXMIQ's Hot Chips model gives a flash-backed rack 14 times the capacity and 58 percent of the bandwidth. Two of the three HBF grades cannot keep pace with today's HBM.
The Engineer · Build desk

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The useful figure is bandwidth per byte held, and the parity model supplies it. On OXMIQ's numbers, the HBM rack carries roughly 77 TB/s of aggregate bandwidth for every terabyte of capacity [1]. The flash rack carries about 3.1 [2]. Capacity goes up fourteen times and the rate at which each stored byte can be delivered falls by about twenty-four [3].
Per model instance the arithmetic is worse. Flash-only lets each GPU hold its own Kimi-K2 and run 72 instances in the rack; HBM-only needs eight GPUs to hold one instance and manages nine [13]. Divide the aggregates and each of the 72 flash-backed instances sits behind about 12.8 TB/s [4], each of the nine HBM instances behind about 176 TB/s [5]. Eight times the instances, each fed at roughly a fourteenth of the rate [6]. Whether that trades well depends entirely on how many tokens per second each instance owes its users, which is why OXMIQ's model has HBM winning on cost per token as concurrency climbs [14].
Granularity is the second constraint and it is structural, not a matter of grades. The smallest write is 64 times the smallest read [7], so anything updated in small pieces pays for a full page every time. That is why the one workload OXMIQ names is expert weights: 1.45 TB of Kimi-K3's 1.56 TB, 93 percent, are MoE experts that are written once and read only when routing selects them [16]. Write-once and rarely read is not a general property of accelerator memory. It is a description of one tensor, which happens to be the largest one, and holding it locally also spares the all-to-all traffic that expert parallelism generates at every layer [17].
The hybrid case is where the model gets uncomfortable. HBM plus HBF gives more than four times the HBM-only capacity [8] but lands anywhere between 279 and 1,418 TB/s depending on conditions [12]. The floor of that range is below the all-flash rack and about 18 percent of the HBM rack, and the range itself spans a factor of five [9]. A part whose delivered bandwidth varies fivefold with workload is hard to size and harder to contract for.
Keep the provenance in view. OXMIQ is a GPU IP company presenting its own model at a conference [1], and SanDisk, which raised the concept in early 2025, pitched it the other way round [2]. What survives both readings is narrow: eight to sixteen times HBM capacity at roughly HBM cost [8], on a technology whose entry grade runs at 384 GB/s and, by the account at Hot Chips, barely competes with current HBM [3][6]. Grade 3 is eight times that [10] and is the only one placed against HBM4E, with no availability anyone has stated [6]. "HBM for the rack, HBF for the box" [15] is a considerably smaller product than terabytes of cheap accelerator memory, and even that version is waiting on the grade that does not yet exist.
Ranked by verification strength, evidence, and original report placement.
OXMIQ Labs, a GPU IP company, revealed at Hot Chips 2026 that High Bandwidth Flash cannot replace High Bandwidth Memory across the vast majority of workloads.
SanDisk unveiled the High-Bandwidth Flash concept in early 2025, pledging to equip AI accelerators with terabytes of relatively inexpensive memory and reduce the need for traditional HBM.
HBF Grade 1 uses an 8-Hi 256GB NAND stack with an 8 GT/s UCIe interface and 384 GB/s of bandwidth.
HBF Grade 2 uses a 512GB NAND stack with a 16 GT/s UCIe interface and supports 1.536 TB/s.
HBF Grade 3 reaches 3.072 TB/s using 32 GT/s UCIe 2.0 while retaining 512GB of capacity.
HBF Grade 1 can barely compete against contemporary HBM, while Grade 3 can compete against HBM4E, though there is no indication of when such memory will be available.
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Evidence-backed comparisons of source perspectives and observed adoption signals. Read the methodology
Which Builder, Operator, and Investor concerns the observed source mix emphasized—not a truth score.
Evidence, demonstrated adoption, hype gap, incentives, and confidence are assessed independently, each on its own current evidence. How these are measured.
Detailed but single-vendor, single-outlet modeling
The quantitative core is specific and internally checkable: three grade specifications, NAND access granularity, and a rack model with capacity, bandwidth and instance counts that survive arithmetic cross-checks (58 percent bandwidth, ~24x bandwidth-density gap, 12.8 vs 176 TB/s per instance). But every figure originates in one interested vendor's Hot Chips slides, relayed by a single publisher, with no disclosed cost/power assumptions, no measured silicon, and one unexplained internal inconsistency in the hybrid bandwidth range.
Pre-product specification stage
Supplied material shows no shipping HBF product, no deployment, and no customer usage. HBF is described as an 'emerging specification' first unveiled as a concept by SanDisk in early 2025, with Grade 1 barely competitive against today's HBM and the only grade competitive with HBM4E having no stated availability date. The single observable event is a conference presentation about grades and a model.
Cheap-memory pitch runs ahead of the shipping hardware
The original pitch - terabytes of inexpensive accelerator memory reducing the need for HBM - is overstated relative to what the supplied evidence supports. Even in the friendliest vendor model, HBF trades 14x capacity for 58 percent of aggregate bandwidth and a ~24x drop in bandwidth per stored terabyte, loses on cost per token as concurrency rises, and only the grade with no ship date approaches HBM4E class. The gap is positive but not extreme because the same source that carries the pitch also carries the deflation, and the narrow use cases (cold MoE experts, sparse-attention KV cache) are argued concretely.
Two interested vendors, one narrative each
Both poles of this story are commercially motivated and the supplied material says so. SanDisk introduced HBF and promoted its cost-reduction promise; OXMIQ Labs, explicitly identified as a GPU IP company, presented the model that recasts HBF as a niche capacity tier and concludes HBM remains the throughput-economical choice. The single outlet relays OXMIQ's slides without a SanDisk rebuttal or disclosure of model assumptions, so the framing rests on interested parties' own materials.
Coherent numbers, thin sourcing
Confidence is moderate-low: the arithmetic in the cluster is verifiable and self-consistent, and the qualitative conclusions follow from the stated figures. But there is one publisher, one interested vendor's model, no measured hardware, no ship dates, and one unexplained anomaly in the hybrid bandwidth range, so directional conclusions are more trustworthy than any specific number.
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