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Science1 publisher3 min readPublished Updated

Silicon's ceiling comes with numbers; its successors so far come with names

A Physics World survey points past the transistor to magnetic bits, in-memory logic, optical and brain-inspired machines. The hard figures in the text supplied are all about the wall, not the exits.

The Scientist · Science desk

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What happened

  • Physics World published a survey by Sidney Perkowitz on how physics could reshape computation, stating that as AI pushes conventional silicon computing towards its physical and energy limits, researchers are exploring radically different ways to process information, from magnetic bits and in-memory logic to optical and brain-inspired machines.
  • Today digital computing uses billions of transistors etched onto semiconducting silicon chips working as tiny switches that represent binary 0 or 1.
  • Supercomputers perform nearly one quintillion operations per second (10^18 floating point operations per second) and manipulate up to 100 petabytes of data.
  • In 1965 Intel co-founder Gordon Moore predicted exponential growth in the number of transistors on a silicon chip, later forecasting a doubling roughly every two years; Moore's law has held for decades, albeit at a lower rate since the mid-2010s.
  • Clock frequency grew from tens to hundreds of megahertz in the 1970s to 1990s until it reached gigahertz levels.

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Why it matters

Physics World has run a survey by Sidney Perkowitz arguing that AI is pushing conventional silicon towards its physical and energy limits, and pointing to magnetic bits, in-memory logic, optical and brain-inspired machines as the directions researchers are exploring [1]. That matters to anyone buying compute because the constraint shows up in the electricity contract before it shows up in the physics: training the largest language models can take up to 100,000 GPUs drawing tens to hundreds of megawatts, according to the article [12].

The diagnosis is well specified. Digital computing still works by switching billions of silicon transistors between binary 0 and 1 [2], and the largest machines built from them reach nearly one quintillion floating point operations per second while handling up to 100 petabytes of data [3]. Moore's law, the 1965 prediction of exponential transistor counts later refined to a doubling roughly every two years, has held for decades but at a lower rate since the mid-2010s [4]. The more consequential break came earlier. Clock speeds climbed from tens of megahertz in the 1970s to gigahertz levels [5], then stopped: by the early 2000s, faster switching drew more power and generated more heat than could easily be dissipated, and frequencies have stagnated at 3 to 5 GHz [6].

Everything since has been parallelism. CPUs got cores, so that four cores at 5 GHz approach four times the throughput without any one core going faster [7]. GPUs took the idea further, trading the 4 to 32 flexible cores of a CPU for hundreds to thousands of simpler ones suited to rendering images or multiplying large matrices [8]. The article is blunt that this is also finite: not every task decomposes into parallel operations, and every additional transistor still costs power and produces heat [9].

Demand is not waiting. By 2025 up to a billion individuals, corporations and governments were using AI systems, a scale the piece describes as highly demanding of both computational and electrical power [10]. Training itself is statistical bulk work, ingesting trillions of tokens to learn language patterns and estimate the probability of the next token [11]. Perkowitz's conclusion is that further progress is approaching saturation because of fundamental limits, and that physics is essential to getting past them [13].

What the supplied text does not do is make the case for the successors. It breaks off mid-sentence in the section on training power, before reaching any of the alternative architectures it advertises [14]. So the honest ledger today is asymmetric: the failure of frequency scaling is dated and quantified [6], the power draw of frontier training is quantified [12], and in-memory logic, spintronics, photonics and spiking hardware are, in this excerpt, a list.

Worth doing the arithmetic that is available. Spread tens to hundreds of megawatts across 100,000 GPUs and you get roughly 100 W to 1 kW per device [15], which is a package and cooling problem, not a lithography problem. That is the number any candidate technology has to beat, and the question to put to each of the four families when the rest of the survey lands is which of them has measured device-level results rather than a physical argument.

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