Apple's M5 Ultra stops being two Maxes glued together, and that changes how you size a Mac Studio

Six times the connection density and 4.4TB/s are two different claims, and dividing one figure by the other shows why the distinction matters. The M3 Ultra's bridge ran at 2.5TB/s ^[4], so 4.4 against 2.5 is 1.76x, about 76 percent more aggregate bandwidth ^[1]. Density rose sixfold ^[4]. Both numbers cannot describe the same improvement: per unit of connection density, the new fabric carries roughly a third of what the old one did ^[2]. That is the arithmetic you would expect from a part that needs far more, shorter links because there are now four dies to join instead of two ^[2].

Engadget's account of the design stops at that structure, two dual-die M5 Max chips fused into a quad-die whole ^[2]. It does not say whether all four dies sit equally close to each other, or to memory. A two-die Ultra joined by a single bridge with more than 10,000 connections had one crossing to reason about ^[3]. A Max that is already internally fused and then fused again is not obviously symmetric, and capacity planning has to allow for that.

The vendor numbers are consistent with a machine whose gains are unevenly distributed. Apple's published examples run from 1.7x in Maxon Redshift to 4.3x on text-to-image work, all against a Mac Studio with M3 Ultra ^[17], a 2.5x spread between the best and worst case Apple chose to print ^[6]. The CPU claims are the modest end ^[7], off 36 cores against 32, which is 12.5 percent more cores ^[3][6]. The large multipliers come from the GPU side, where the core count is unchanged at 80 but each core gains a Neural Accelerator rated at up to 4.5x the AI compute of M3 Ultra ^[11], and from memory running 50 percent faster at 1.2TB/s ^[9].

So the two numbers worth building a plan around are 1.2TB/s to memory and 4.4TB/s across dies ^[9][4]. Media throughput scales in that direction too: 33 simultaneous 8K 30fps ProRes streams against 24, which is 37.5 percent more ^[14][4].

The storage spec deserves less attention than its headline. PCIe Gen 6 internally, up to 128GB/s on x16 devices ^[15], sits against a fastest-shipping-drive figure of 28GB/s from Micron, roughly 4.6 times more interface than anything on the market can fill ^[16][5]. Engadget calls it overkill, and that reading is hard to argue with ^[16]. Thunderbolt 5 stays at 120Gbps ^[15].

One thing the new recipe did not fix is the node. The M5 Ultra is built on TSMC's third-generation 3nm process while the M6 ships on 2nm ^[18]. That lag has always been the price of waiting for Max silicon to exist before fusing it ^[5], and it now applies across four dies rather than two ^[2]. Apple's own efficiency language came without figures ^[8], which is the part of the pitch to discount until someone measures it.