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A 180M-parameter model on a $6 board says the microcontroller limit was active params, not total

p-for-llm puts a 29-expert, top-1-routed mixture of experts on an ESP32-P4 and got two points on Hacker News. The routing, not the quantization, is the load-bearing part.

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What happened

  • On August 5, 2026, a developer going by cyfrit posted a project called p-for-llm to Hacker News; it collected two points and slid off the new page.
  • p-for-llm is a 180.9-million-parameter mixture-of-experts model running inference on an ESP32-P4 clocked at 360MHz, on a board with 32MB of PSRAM and 16MB of flash that sells for six to ten dollars.
  • The architecture is twelve layers deep, and each layer carries 29 experts with top-1 routing: for any given token the router picks exactly one expert per layer and the other 28 stay dark.
  • The dev.to account argues that on a chip with a few megabytes of usable working memory, the activated-slice ratio is the entire reason a 180.9M-parameter model is even discussable; total parameter count buys knowledge but only the activated slice costs compute.
  • The weights are quantized in a W1.58A8 scheme: ternary weights, eight-bit activations, the BitNet-style recipe that stores each weight as roughly one of three values instead of a float.

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Why it matters

On August 5, 2026, a developer using the handle cyfrit posted a project called p-for-llm to Hacker News, where it collected two points and slid off the new page [1]. It is a 180.9-million-parameter mixture-of-experts model running inference on an ESP32-P4 clocked at 360MHz, on a board with 32MB of PSRAM and 16MB of flash that sells for six to ten dollars [2], and what makes it fit is a routing decision rather than a compression trick.

The architecture is twelve layers, each carrying 29 experts with top-1 routing: for any given token, at each layer, the router picks exactly one expert and the other 28 stay dark [3]. That leaves about 96.6 percent of expert capacity dormant on a forward pass [1]. On a part with a few megabytes of usable working memory, the dev.to account argues, that ratio is not an optimisation but the precondition for a 180.9M-parameter model being discussable at all [4].

The rest is conventional squeezing. Weights are quantized W1.58A8, meaning ternary weights and eight-bit activations, the BitNet-style recipe [5]. The vocabulary is pruned down from Qwen3.5's [6], context is 1024 tokens [7], the whole weight set lands at roughly 44MiB spread across flash and PSRAM [8], and generation runs at about 9 tokens per second [9]. Those two figures together imply an average of roughly 2.04 bits per stored parameter [2]. cyfrit reports training the model on approximately 12 billion tokens using a single RTX 5060 Ti [10].

Set that against the ESP32-S3 project that went viral eleven days earlier, which took 289 points and 74 comments and was written up by Adafruit on July 29, CNX Software on August 3 and The Register on August 4 [11][12]. That project runs a 28.9M-parameter model trained on TinyStories at 9.88 tokens per second on an eight-dollar board, and by its own creator's account it writes short children's stories and does nothing else: no question answering, no instruction following, no calling anything [13][14]. p-for-llm carries 6.26 times the parameters [3] at roughly 9 percent lower throughput [4], and it accepts ChatML-formatted prompts, which makes it an instruction-following model rather than a pure text continuator [15]. The extra parameters are close to free per token because they are close to always switched off. That is the argument, and it is the same argument the large labs make three orders of magnitude up the curve.

The footnote is real and cyfrit discloses it in the repository: weights are pushed to the board over USB from a host machine at startup, and loading them from an SD card is listed as future work rather than a shipped feature [16]. The dev.to writer's taxonomy places esp32-ai in tier one, weights and computation both resident on the microcontroller, and p-for-llm in tier two, on-device compute with streamed weights [17]. The arithmetic does happen on the P4, and the 44MiB does sit in the board's own flash and PSRAM once loaded [18]. Streaming weights once at boot is also a different category from Espressif's own official LLM offering, which the same piece describes as cloud inference by design [19].

Watch three things. Whether SD-card loading ships, since that is the only item between this and full autonomy [16]. Whether anyone independently reproduces the 9 tokens per second and the single-GPU training run [9][10]. And whether top-1 routing plus ternary weights becomes the default recipe for microcontroller-class models, rather than a one-off, because if it does, the 1024-token context becomes the next binding constraint [7].

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