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Synopsys lifts 2026 guidance: 2.1% on earnings, 0.3% on the top of the revenue range

AI design spending is reaching the tooling layer, but it arrives diluted. Annualised electronic system design revenue is about 2.8% of 2025 semiconductor sales.

The Investor · Invest desk

Photograph accompanying Synopsys lifts 2026 guidance: 2.1% on earnings, 0.3% on the top of the revenue range
Photo: prnewswire.com

What happened

  • Synopsys lifted full-year fiscal 2026 guidance to revenue of $9.69bn to $9.74bn and adjusted earnings of $15.04 to $15.10 a share.
  • Revenue for the three months to July 31 came in at $2.477bn against $1.740bn a year earlier.
  • The stock fell about 2% in after-hours trading anyway.
  • Gartner said on August 24 that world semiconductor revenue reaches $1.6 trillion by 2026, up 92% from $809bn in 2025.

Compiled by The InvestorSomething wrong?How this is made

Why it matters

  • constraint Because the upgrade arrived mainly in earnings rather than sales, the guide cannot carry much weight as a volume proxy for AI capex; it prices margin, not design activity.
  • contradiction Gartner's 2026 call needs chip revenue to nearly double in one year, a pace nothing in the measured tooling data corroborates.
  • decision Anyone holding EDA names as an AI infrastructure proxy has to choose between Synopsys's rounding-error revenue upgrade and Cadence's much bolder backlog claim, and only one of them can be the base...
  • exposure As hyperscalers pull design in-house, more of Synopsys's IP revenue depends on programme schedules set by buyers whose core business is not selling chips.

Pull the raise apart and it is mostly a profit raise. The midpoint of the new revenue range works out at $9.715 billion [1], which is 0.36% above the $9.68 billion consensus that LSEG data gave Reuters [4] [2]. The midpoint of the adjusted earnings range is $15.07, and that sits 2.1% above the $14.76 consensus [3]. The earnings upgrade is therefore about six times the size of the revenue upgrade [4]. At the top end, the revenue range moved $30 million, or 0.31%, past the prior ceiling of $9.71 billion [3] [5].

The consensus itself is worth a second look. That $14.76 is exactly the midpoint of Synopsys's own previous guidance of $14.72 to $14.80 per share [2] [8]. Analysts were repeating the company back to itself, so the earnings raise is measured against a number the company set.

The quarter is the loud figure. Four quarters at the July-quarter level would come to $9.91 billion [7], above the top of the full-year range just guided. Either the earlier quarters were materially smaller, or the guide assumes the run rate goes nowhere from here. Year on year the quarter grew 42.4% [6], and the report gives no segment breakdown beyond design IP returning to year-over-year growth [15], so how much of that 42.4% is organic is not something this material lets you verify.

Then the transmission question, which is what the AI framing rests on. Gartner has AI data centres rising from 36.5% of the semiconductor market to 53% by 2030 [10], and its 2026 number implies chip revenue nearly doubling in a single year [9]. The measured pass-through into tooling is smaller and slower: the ESD Alliance, a SEMI coalition, counted $5.75 billion of electronic system design revenue in the first quarter of 2026, up 12.7%, with semiconductor IP and computer-aided design doing much of the work [11]. That growth rate is roughly a seventh of what Gartner has pencilled in for chips [11]. Synopsys software sits in almost every high-end design heading for a fab [16], and CFO Shelagh Glaser told Reuters that "the growth is really underpinned by the strong design environment we're seeing, and the main thing driving it is AI" [7]. Both can be true while the tooling layer still captures a small share of the capex dollar.

Cadence has taken the more aggressive line: a 19% growth forecast for 2026 set in July, alongside a record backlog [12] that equals about 83% of Synopsys's entire guided year of revenue [9]. Not a like-for-like comparison, but it sets the scale. Anirudh Devgan's framing, "leading the agentic AI transformation in semiconductor design" and a "massive TAM expansion opportunity" [13], is language. The backlog is a number, and it is the one that gets tested next quarter.

The customer mix is genuinely moving. Amazon and Alphabet expanding in-house silicon, per Reuters, widens the buyer set beyond the merchant chipmakers, and those custom accelerators still need verification software and licensable blocks [14]. Synopsys says AI has pushed clients into more complex designs on tighter schedules [17]. For now, that pressure is worth $30 million more revenue on the year than the company said last quarter, and $0.31 a share.

What to watch

  • Whether the full filing breaks out how much of the 42.4% year-over-year quarterly revenue gain is organic rather than acquired.
  • Cadence's next report against its 19% growth guide and record backlog, the cleanest available test of whether tooling demand is accelerating or simply being re-signed.
  • Any Gartner revision to the $1.6 trillion 2026 semiconductor number, which currently requires 92% growth in a single year.
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